Optimizing Cray MPI and Cray SHMEM for Current and Next Generation Cray-XC Supercomputers

Modern compute architectures such as the Intel Many Integrated Core (MIC) and the NVIDIA GPUs are shaping the landscape of supercomputing systems. Current generation interconnect technologies, such as the Cray Aries, are further fueling the design and development of extreme scale systems. Message Passing Interface (MPI) and SHMEM programming models offer high performance, portability and high programmer productivity. Owing to these factors, they are strongly entrenched in the field of High Performance Computing. However, it is critical to carefully optimize communication libraries on emerging computing and networking architectures to facilitate the development of next generation science. Cray XC series supercomputers are some of the fastest systems in the world. Current generation XC systems are based on the latest Intel Xeon processors and the Aries high performance network. In addition, the Cray XC system enables users to accelerate the performance of their applications by leveraging either the Intel MIC, or the NVIDIA GPU architectures. In this paper, we present six major research and development thrust areas in Cray MPI and Cray SHMEM software products targeting the current and next generation Cray XC series systems. In addition, this paper also includes several key experimental results.